Low-swing on-chip signaling techniques: effectiveness and robustness
نویسندگان
چکیده
This paper reviews a number of low-swing on-chip interconnect schemes and presents a thorough analysis of their effectiveness and limitations, especially on energy efficiency and signal integrity. In addition, several new interface circuits presenting even more energy savings and better reliability are proposed. Some of these circuits not only reduce the interconnect swing, but also use very low supply voltages so as to obtain quadratic energy savings. The performance of each of the presented circuits is thoroughly examined using simulation on a benchmark interconnect circuit. Significant energy savings up to a factor of six have been observed.
منابع مشابه
Towards low-power yet high-performance networks-on-chip
A network-on-chip (NoC), the de-facto communication backbone in manycore processors, consumes a significant portion of total chip power, competing against the computation cores for the limited power and thermal budget. On the other hand, overall system performance of manycore chips increasingly relies on on-chip latency and bandwidth as core counts scale. This thesis aims to design low-power ye...
متن کاملLow - Swing Signaling for Energy Efficient On - Chip Networks
On-chip networks have emerged as a scalable and high-bandwidth communication fabric in many-core processor chips. However, the energy consumption of these networks is becoming comparable to that of computation cores, making further scaling of core counts difficult. This thesis makes several contributions to low-swing signaling circuit design for the energy efficient on-chip networks in two sepa...
متن کاملA Study of Low to High Swing Converters for On-chip Interconnects in Cmos Voltage Interface Cicuits
This paper explores the use of interconnect signaling techniques to improve Delay time for performance and reduce power consumption of On-chip interconnect. The various Driver–Receiver pairs such as ddc-db, asf-lc, mj-sib and mj-db for On-chip interconnect with different capacitive load at the output of the circuit are being explored in detail. A detailed comparison of the driver-receiver pairs...
متن کاملA Study of Low to High Swing Converters for On-chip Interconnects in Cmos Voltage Interface Circuits
This paper explores the use of interconnect signaling techniques to improve Delay time for performance and reduce power consumption of On-chip interconnect. The various Driver–Receiver pairs such as ddc-db, asf-lc, mj-sib and mj-db for On-chip interconnect with different capacitive load at the output of the circuit are being explored in detail. A detailed comparison of the driver-receiver pairs...
متن کاملA 0.6pJ/b 3Gb/s/ch transceiver in 0.18 µm CMOS for 10mm on-chip interconnects
This paper presents a high speed and low energy transceiver for 10mm long minimum width on-chip global interconnects. To improve the link bandwidth, the transmitter employs a capacitive-resistive pre-emphasis technique and the receiver employs the AC-coupled Resistive Feedback Inverter (RFI) de-emphasis technique. Exploiting two emphasis techniques, the proposed interconnect achieves 1.26GHz ba...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- IEEE Trans. VLSI Syst.
دوره 8 شماره
صفحات -
تاریخ انتشار 2000